[diycalculator_hw_bug] [Bug 32] SPI Module fails to write flash on some prototypes

[PCL_bugzilla-daemon at printed.inbus.at]

http://svn.pcl.at/bugzilla/show_bug.cgi?id=32


helmut.zulus at pcl.at changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED




------- Comment #2 from helmut.zulus at pcl.at  2007-05-25 12:02 UTC -------
after splitting CLK domains and fine tuning constraints, timing report shows
now about 55MHz maximum CLK frequency - far better then the targeted 25MHz :)


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